Title:
QUANTIZATION NOISE DECREASING CIRCUIT
Document Type and Number:
Japanese Patent JPS6489775
Kind Code:
A
Abstract:
PURPOSE:To decrease quantization noise by providing a first automatic gain control part to control, at a constant level, the luminance level of a video signal written into a digital memory, and a second automatic gain control part to restore it to the signal with the same waveform as that of the video signal in a digital memory. CONSTITUTION:The signal with a low luminance level out of the input video signals is controlled at the same level with the signal with the high luminance level by a peak AGC circuit 1, and stored into a digital memory 3. A synchronizing AGC circuit 5 pulls only a synchronizing signal from the output signal of a low-pass filter 4 with a synchronizing separator signal 6, delays the synchronizing signal by a prescribed time with a delay circuit 7, and is controlled by an AGC detecting circuit 8 to operated with the output of the delay circuit 7. For the video signal with the same luminance level passing through the low-pass filter 4, since the synchronizing level is controlled at constant by the synchronizing AGC circuit 5, the video signal with the same waveform as that of the original input video signal is outputted. Thus, since the video signal can be stored into the digital memory at the constant level regardless of the height of the luminance level of the input video signal, the quantization noise of a reproduced picture becomes inconspicuous.
Inventors:
IWAHASHI SHOGO
Application Number:
JP24399587A
Publication Date:
April 04, 1989
Filing Date:
September 30, 1987
Export Citation:
Assignee:
TOSHIBA CORP
International Classes:
H03M1/18; H04N5/92; H04N5/93; H04N5/937; (IPC1-7): H03M1/18; H04N5/92; H04N5/93
Attorney, Agent or Firm:
Noriyuki Noriyuki (1 person outside)