PURPOSE: To enhance quantizing accuracy, by detecting the count noise of a clock pulse at the time of quantization and correcting a count value corresponding to said noise.

CONSTITUTION: At first, an input wave form is made synchronous to a clock pulse by a synchronous circuit S. Next, the number of clock pulses synchronized by a counter CT are counted. Subsequently, the mutual phase difference between the phase of the front edge of the input wave form and the phase of the head pulse of the clock pulses synchronized and the mutual phase difference between the phase of the rear edge of the input wave form and the phase of the final pulse of the clock pulses synchronized are detected in phase difference detection circuits (AND2, NAND). Subsequently, both phase differences are analogously added up by holding circuits (C, Q3WQ6) and the calculated value is held. Further, from the view that the value held reaches a predetermined upper or lower limit value, the count value of the counter C is corrected by correction circuits (CP1, 2, AD) so as to be increased or decreased by the unit quantity thereof. By this method, a quantizing error can be reduced without especially increasing the speed of the counter CT or the peripheral elements thereof.