Title:
QUICK-RESPONSE CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPH0865154
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To shorten the control time of a control system like a PLL by increasing the charging/discharging speed of a capacitor which integrates an error signal when the error signal increases above a specific threshold value. SOLUTION: This system consists of means 20 and 22 which couple a signal representing an error of a system like a PLL 10 with the integral capacitor 18 and adding means Q1 and Q2 which supply an additional current to the integral capacitor to shorten its response time when the signal representing the error is larger than the previously set threshold value. When the signal representing the error is less than the specific threshold value, the adding means Q1 and Q2 are made ineffective and the PLL operates in such a style that the adding means are absent.
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Inventors:
DEIBITSUDO MAAKU BAJIYA
Application Number:
JP22244095A
Publication Date:
March 08, 1996
Filing Date:
July 28, 1995
Export Citation:
Assignee:
THOMSON CONSUMER ELECTRONICS
International Classes:
H03L7/093; H03L7/10; H03L7/107; H04N5/44; (IPC1-7): H03L7/093; H03L7/10; H04N5/44
Attorney, Agent or Firm:
Katsunori Watanabe
Next Patent: CONTROL SYSTEM