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Title:
RADAR TEST DEVICE
Document Type and Number:
Japanese Patent JPS60186769
Kind Code:
A
Abstract:

PURPOSE: To connect a radar device and a radar test device through only a pretrigger signal line by using a phase synchronizing clock as the pretrigger signal during the evaluation of the moving target erasure performance of the radar device or a highly stable crystal oscillation clock in other cases.

CONSTITUTION: The clock synchronizing with the pretrigger signal from the radar device is outputted by a delay line oscillator 1 only; during the evaluation of the moving target erasure performance while a switch 3 driven in response to a switch (a) is controlled, and used through the switch 3. When other tests are taken, the stable clock from the 1st oscillator is used to control a gate circuit 5 supplied with a clock from the 2nd crystal oscillator 7 through a PLL circuit 6 through a timing circuit 4 applied with the pretrigger signal, etc., and accurate distance tests, etc., having no jitters due to one clock shift are taken. Therefore, no accurate clock from the radar device need not be supplied to a remote testing device and both devices are connected mutually through only one signal for the pretrigger signal.


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Inventors:
KANEGAE SEIICHI
Application Number:
JP4253084A
Publication Date:
September 24, 1985
Filing Date:
March 06, 1984
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G01S7/40; (IPC1-7): G01S7/40
Attorney, Agent or Firm:
Masuo Oiwa



 
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