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Title:
RADIO COMMUNICATION EQUIPMENT
Document Type and Number:
Japanese Patent JP3182312
Kind Code:
B2
Abstract:

PURPOSE: To hold a stable synchronizing state by comparing input data with a word synchronizing pattern, and when the number of errors is less than the allowable number of errors determined by an error determining means, outputting a word synchronism detection signal.
CONSTITUTION: After executing error allowable value setting processing, a control circuit 15 executes error processing detecting processing corresponding to the phase difference of received data. Then the circuit 15 sets up the number of shift steps of a word synchronizing pattern corresponding to data set up in a shift register and finds out EOR between the data of the shift register and the word synchronizing pattern. The circuit 15 counts up error ('1') information obtained as an EOR result and stores the error information in an area of a word synchronizing position memory 16 which corresponds to a difference (phase difference) from a synchronizing word predicting position. Then the circuit 15 compares a minimum error information value with an error allowable value determined by the error allowable value setting processing. When the minimum value is less than the allowable value as the result of comparison, said processing 15 repeated, and at the time of exceeding the error allowable value, a synchronism definition flag is canceled.


Inventors:
Takaaki Hasegawa
Application Number:
JP4413495A
Publication Date:
July 03, 2001
Filing Date:
March 03, 1995
Export Citation:
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Assignee:
Sanyo Electric Co., Ltd.
Tottori Sanyo Electric Co.,Ltd.
International Classes:
H04L27/22; H04B7/26; H04J3/06; H04L7/00; H04L7/08; (IPC1-7): H04B7/26; H04J3/06; H04L7/00; H04L27/22
Domestic Patent References:
JP5327688A
JP609241A
JP52115609A
JP463028A
Attorney, Agent or Firm:
Takashi Okada