Title:
抵抗変化型ランダムアクセスメモリ
Document Type and Number:
Japanese Patent JP6430576
Kind Code:
B2
Abstract:
A resistive random access memory with superior area efficiency and higher reliability is provided. The resistive random access memory RRAM in the present invention includes a memory array, which includes a plurality of memory cells MC arranged in rows and columns. Each memory cell MC includes a variable resistive element and an access transistor. Gates of the access transistors in a column are connected to a word line WL. First electrodes of the variable resistive element in a row are connected to a bit line BL. Second electrodes of the variable resistive element in the row are connected to a source line SL. The source line SL includes a local source line 250, which extends in a direction that is orthogonal to the bit lines BL0/BL1/BL2/BL3 and is shared by the bit lines BL0/BL1/BL2/BL3.
Inventors:
Yasuhiro Tomita
Application Number:
JP2017082443A
Publication Date:
November 28, 2018
Filing Date:
April 19, 2017
Export Citation:
Assignee:
Winbond Electronics Corporation
International Classes:
G11C13/00; H01L21/8239; H01L27/105; H01L45/00; H01L49/00
Domestic Patent References:
| JP2014063549A | ||||
| JP2012221525A | ||||
| JP2013114726A | ||||
| JP2010225259A |
Attorney, Agent or Firm:
Kyozo Katayose