PURPOSE: To solve a problem of deteriorated S/N by decreasing number of valid bits other than those for a synchronizing signal when an amplitude of an input signal is increased in time division to match an input dynamic range with that of the input signal.

CONSTITUTION: AD conversion processing is applied to each input signal with an optimum dynamic range by differentiating an input dynamic range to an A/D converter 13 from gate pulse information through the decision of an AD conversion highest terminal potential at a 1st reference voltage generating section 1 and the decision of an AD conversion lowest terminal potential at a changeover device 4 providing selectively a voltage of a 2nd or 3rd reference voltage generating section 2 or 3 in response to information of a gate pulse generating circuit 16.