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Title:
RAS CIRCUIT
Document Type and Number:
Japanese Patent JPS6027958
Kind Code:
A
Abstract:

PURPOSE: To obtain a simple circuit which secures reliability by ORing the output of an FF which receives a diagnostic result signal as a set or reset input and a system start signal as the reset or set input with the system start signal.

CONSTITUTION: When the system start signal 14 goes down to a level L, a self- diagnosing circuit 8 is actuated to reset a peripheral circuit 10, and the signal 12 sets an FF12 to the level L at the same time, so the FF is fixed at the level L by a driver element 15 connected to the Q output. When the diagnosing operation is completed normally, a diagnostic result output signal 13 goes down to the level L to hold the Q output of the FF12 at a level H, and the signal 14 is returned to the level H. If a fault is found, on the other hand, the signal 13 goes up to the level H, the signal 14 is held at the level L, and the circuit 10 is still reset. Consequently, the circuit (RAS circuit) for securing the reliability has no special input/output pin and the system start signal 14 is only utilized, so large practical effect as for a microprocessor is obtained.


Inventors:
OZAWA SUMIO
Application Number:
JP13699883A
Publication Date:
February 13, 1985
Filing Date:
July 26, 1983
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F11/22; (IPC1-7): G06F11/22
Attorney, Agent or Firm:
Toshio Nakao



 
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