PURPOSE: To realize the instantaneous display of an overall outline of a virtual memory in the horizontal direction on a display screen, by compressing properly a read address to the virtual memory which is continuous in the horizontal direction of the screen.
CONSTITUTION: A basic dot clock of a frequency f1 is received from a basic dot clock generating circuit 4; while a compressed dot clock of a frequency f2 higher than the f1 is received from a compressed dot clock generating circuit 2 respectively. In a compression mode the start read address given from a 2nd address register 10 is preset. At the same time, the read addresses set in the horizontal direction on a display screen are counted and outputted in response to the compressed dot clock through the start read address. Then a latch circuit 16 latches and outputs the read address through an up-counter 14 in response to the basic dot clock. Thus it is possible to display the data on the overall outline all at once on the screen for a virtual memory where data are read out.