Title:
REARRANGING CIRCUIT OF DIGITAL DATA STRING
Document Type and Number:
Japanese Patent JPS60175180
Kind Code:
A
Abstract:
PURPOSE:To attain rapid operation with the small size of hardware by reading out data on the basis of forward address signals and writing data on the basis of bit-backward address signals. CONSTITUTION:A reading instruction is supplied from a terminal 10 to a memory circuit 9 and data strings X0-X15 are successively outputted from a memory circuit 9 by forward address signals A1 supplied from an address generating circuit 1 and supplied to a memory circuit 12 through a delay circuit 11. A writing instruction is supplied from a terminal 14 to the memory circuit 12 and the data strings X0-X15 outputted from the memory circuit 9 are stored in the memory circuit 12 by bit-backward address signals A2. Consequently, the data strings X0-X15 are stored in the addresses (0000), (0001), (0010)...in the memory 12, so that the digital data strings are rearranged.
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Inventors:
HASEBE ATSUSHI
KATOU RIYOUHEI
KATOU RIYOUHEI
Application Number:
JP3116084A
Publication Date:
September 09, 1985
Filing Date:
February 21, 1984
Export Citation:
Assignee:
SONY CORP
International Classes:
G06F17/14; (IPC1-7): G06F15/332
Attorney, Agent or Firm:
Masatomo Sugiura