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Patent Searching and Data


Title:
RECEIVED SIGNAL LEVEL ESTIMATING DEVICE
Document Type and Number:
Japanese Patent JPH11234141
Kind Code:
A
Abstract:

To estimate a received signal level with a simple constitution by converting the metric value of a path decoded and determined by determining a path of highest likelihood from the received signal to a received level through the use of a conversion table.

When a received signal consisting of plural continuous frames is inputted to a Viterbi decoder 16, a BM circuit 18 calculates the branch metric of each branch, and a latch circuit 20 latches the path metric of a surviving path. An ACS circuit 22 adds the branch metric to the path metric of the surviving path according to a trellis chart, compares the path metrics of two paths directed toward the same state with each other, selects the surviving path and outputs a decoded signal through a path memory 24. The circuit 200 is reset at the head of each frame, and the path metric value of the highest likelihood is outputted at the end of each frame. A conversion table 26 converts this path metric value to the received level of each frame to generate an output.


Inventors:
TAJIMA YOSHIHARU
OBUCHI KAZUCHIKA
SUDA KENJI
YANO TETSUYA
KAWABATA KAZUO
Application Number:
JP3570998A
Publication Date:
August 27, 1999
Filing Date:
February 18, 1998
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04L25/02; H03M13/23; H04B17/00; H04B17/318; (IPC1-7): H03M13/12; H04B17/00; H04L25/02
Attorney, Agent or Firm:
Takashi Ishida (3 others)