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Patent Searching and Data


Title:
RECEIVING UNIT
Document Type and Number:
Japanese Patent JPS5596705
Kind Code:
A
Abstract:

PURPOSE: To make adjustment possible while receiving signals, by switching the unit so that the ratio of DC components gain to AC components gain in the LPF in the loop of a PLL circuit may be small for set of a channel selection voltage in respect to the receiving unit of the complete synchronous detection system.

CONSTITUTION: When a channel selection voltage to be applied to a local oscillation circuit is set in a channel selection voltage setting circuit, a high-level voltage is applied to range switching circuit 15, which is connected to the connection point between capacitor C2 and resistance R2 of LPF 13 consisting of resistance R1 and R2, capacitor C2 and amplifier A and consists of resistance R3 and transistor T, for the purpose of reducing the ratio of AC components gain to DC components gain in LPF 13. By this voltage applying, transistor T is made conductive to connect resistance R3 in parallel to resistance R2, thereby reducing the ratio of AC components gain to DC components gain in LPF 13.


Inventors:
USUI AKIRA
FUJIMORI TOSHIMITSU
KUCHIKI TETSUO
YAMAMOTO HIROSUKE
Application Number:
JP451579A
Publication Date:
July 23, 1980
Filing Date:
January 18, 1979
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H04B1/26; H03D1/00; H03D1/22; H04B1/30; (IPC1-7): H03D1/00; H04B1/26; H04B1/30
Domestic Patent References:
JPS5054274A1975-05-13
JPS5193103A1976-08-16