PURPOSE: To evade the circuit scale from being dependent on the number of kinds of information to be multiplexed by writing the information of a header area together with a reception parallel signal to a set address of a memory circuit, checking the header of the reception signal and storing the reception signal of the data area to each reception buffer corresponding to the header respectively.

CONSTITUTION: The circuit consists of a serial parallel conversion circuit 1, a flip-flop circuit 2, a write control circuit 3, a microprocessor circuit 4, a memory circuit 5, reception buffer circuits 6-9 and a program storage memory circuit 10. The information of a header area is written in a prescribed address of the memory circuit 5 together with a received parallel signal, the microprocessor circuit 4 checks the header of the reception signal and the reception signal of the data area is stored respectively in each reception buffer corresponding to the header. Thus, the reception circuit is obtained, the circuit scale of which is independent of the number of kinds of the information to be multiplexed.