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Patent Searching and Data


Title:
RECEPTION PROCESSOR OF TRANSMISSION LINE DOUBLED SYSTEM
Document Type and Number:
Japanese Patent JPH07253938
Kind Code:
A
Abstract:

PURPOSE: To improve the processing speed by lightening the load on a processor while obtaining high reliability in data transmission.

CONSTITUTION: Driver receivers 1a and 1b are connected to transmission lines of two systems through which the same serial data are transmitted at the same time. The serial data received by the driver receivers 1a and 1b are converted by I/Os 2a and 2b into parallel data. The I/Os 2a and 2b once inputting the data from the driver receivers 1a and 1b sends an acknowledgement signal to a comparator 4 through an OR circuit 5 and compares the parallel data outputted from the I/Os 2a and 2b with each other. When both the parallel data match with each other, a two-way buffer 3 is opened to transmit the parallel data outputted from the I/O 2a to an internal bus B.


Inventors:
KITAMURA TOSHIHIRO
Application Number:
JP4377394A
Publication Date:
October 03, 1995
Filing Date:
March 15, 1994
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC WORKS LTD
International Classes:
G06F11/18; G06F13/00; H04L1/22; H04L69/40; (IPC1-7): G06F13/00; G06F11/18; H04L1/22; H04L29/00; H04L29/14
Attorney, Agent or Firm:
Ishida Chochichi (2 outside)