RECONNECTABLE CHIP INTERFACE AND CHIP PACKAGE

Title:

RECONNECTABLE CHIP INTERFACE AND CHIP PACKAGE

Document Type and Number:

Japanese Patent JP2005051239

Kind Code:

A

Abstract:

To provide a reconnectable chip interface and a chip package.

Electrical connection pads 23, 27 on a circuit device and on a substrate are brought into contact with each other when the circuit device and the substrate are connected to each other. At least a single first protrusion 37 on one of the device and the substrate and at least two second protrusions 39 on the other of the device and the substrate have their lengths in the axial direction. The protrusions are so sized and shaped as to be closely friction-fit along their axial lengths when they engage with each other. The integrated circuit device package includes an integrated circuit device and an interconnection board for mounting the integrated circuit device on an electronic circuit board. The interconnection board forms an enclosed space which is combined with the active surface of the integrated circuit device for the formation.

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Inventors:

GILLEO KENNETH B

Application Number:

JP2004210546A

Publication Date:

February 24, 2005

Filing Date:

July 16, 2004

Export Citation:

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Assignee:

COOKSON ELECTRONICS INC

International Classes:

H01L21/60; H01L23/32; H01L23/48; H01L23/498; H01L31/0203; (IPC1-7): H01L23/32

Attorney, Agent or Firm:

Teruo Akimoto

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