PURPOSE: To read out a series of data at a high speed by providing a control memory which produces an address for sound record/reproduction to be stored in a voice data memory and an address selecting ciircuit.
CONSTITUTION: In a reproduction mode a microprocessor μP sets a head address A corresponding to a message, end address B and a working address C on a control memory CM. When no coincidence is obtained between address C and B compared by a comparator COM, i.e., the message is under transmission, the working address data is replaced by +1 to prepre for the next reading. Thus the output of an adder ADD is used as the input of the memory CM. While the output of a register 2 holding the address A is used as the input of the memory CM when the coincidence is obtained between addresses C and B, i.e., the message is completely transmitted.
TAKECHI HIROAKI
KUNIGAMI TOSHIO
| JPS57100500A | 1982-06-22 | |||
| JPS5798194A | 1982-06-18 | |||
| JPS55151699A | 1980-11-26 |