To obtain such a redundant circuit that is useful for mask ROMs and can further shorten the access time at redundant time.
An address inputted through an input buffer 4 is supplied to both a normal decoder 10 and redundant address storing circuit 6. When the address indicates a defective memory cell, redundant addresses RRO-RRn are generated from the circuit 6 and correcting data RDO-RDn stored in a redundant data storing circuit 8 by using a fuse, etc., are accessed. When the addresses RRO-RRn are generated, in addition, a redundant address summator 14 outputs a route selecting signal SD and the circuit 8 is directly connected to a data outputting buffer 26 through a route selected by means of a data outputting route selecting circuit DES. Namely, the access time can be shortened, because data can be outputted without through the sensing and amplifying operations of a sense amplifier 24.
KOU SOUKI
RI KEIKON
| JPH04195887A | 1992-07-15 | |||
| JPH01273299A | 1989-11-01 | |||
| JPH06139796A | 1994-05-20 | |||
| JPS6031038A | 1985-02-16 | |||
| JPH02282998A | 1990-11-20 | |||
| JPH04291098A | 1992-10-15 |
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