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Patent Searching and Data


Title:
REFERENCE CLOCK GENERATOR CIRCUIT
Document Type and Number:
Japanese Patent JPH04281617
Kind Code:
A
Abstract:

PURPOSE: To obtain clocks of three kinds of sampling frequencies, 32, 44.1, 48kHz used for a digital audio equipment and clocks whose frequencles are a multiple of 256 of them by frequency-dividing variably the oscillation output of one original oscillator circuit.

CONSTITUTION: The generating circuit is featured to have an original oscillator circuit 2 generating an original clock whose frequency is 36.864MHz, a variable frequency divider circuit 3 frequency-dividing the original clock MCK, a frequency division number designation circuit 5 selecting the frequency division number of the variable frequency divider circuit 3 to be 1/3 when a sampling frequency 48kHz is obtained, selecting the frequency division number of the variable frequency divider circuit 3 to be 1/4.5 when a sampling frequency 32kHz is obtained, selecting the frequency division number of the variable frequency divider circuit 3 to be 1/3 for 47 times and to be 1/4 for 17 times so that the internal of 1/4 frequency division is almost an equal interval when a sampling frequency 44.1kHz is obtained, and a fixed frequency divider circuit 4 applying 1/256 frequency division to the output of the variable frequency divider circuit 3.


Inventors:
HASEGAWA AKIO
Application Number:
JP6921191A
Publication Date:
October 07, 1992
Filing Date:
March 08, 1991
Export Citation:
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Assignee:
VICTOR COMPANY OF JAPAN
International Classes:
H03K23/64; (IPC1-7): H03K23/64
Attorney, Agent or Firm:
Yoichiro Shimoda (1 person outside)