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Title:
REFERENCE CURRENT GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JP2006285337
Kind Code:
A
Abstract:

To provide a reference current generating circuit for preventing the positive input voltage of an operating amplifier from being made smaller than a negative input voltage.

This reference current generating circuit 100 is provided with a first current source means 102 having a negative input terminal Va to an operating amplifier which is not shown in figure for generating first currents in proportion to the voltage of a diode D1, a second current source means 104 having a positive input terminal Vb to the operating amplifier for generating second currents in proportion to a thermal voltage, a PMOS(P-type Metal Oxide Semiconductor ) transistor MP5 whose drain is connected to an output terminal V1 of the operating amplifier and an NMOS(N-type Metal Oxide Semiconductor) transistor MNa whose gate is connected to the negative input terminal Va of the operating amplifier, wherein a resistance R4 is made to generate reference currents obtained by adding the first and second currents. This circuit is characterized to include a resistance element Ra connected between the drain V1 of the PMOS transistor MP5 and the drain da of the NMOS transistor MNa.


Inventors:
SUGIMURA NAOAKI
Application Number:
JP2005100754A
Publication Date:
October 19, 2006
Filing Date:
March 31, 2005
Export Citation:
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Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
G05F3/24; H03F3/34
Domestic Patent References:
JPH1145125A1999-02-16
JPS5871214A1983-04-27
Attorney, Agent or Firm:
Takao Katori