Title:
2次元マトリクス処理のためのレジスタ
Document Type and Number:
Japanese Patent JP5466211
Kind Code:
B2
Abstract:
A processor has at least two sets of registers. The first set stores a matrix of data, and the second set stores a transposed copy of the matrix of data. When any portion of any row of the first set is modified, the corresponding portion of the column of the transposed copy in the second set is also automatically modified. A method of using two sets of registers for matrix processing by a processor includes storing a matrix of data into a first set of registers, the first set of registers having a first number of registers, each register comprising a first number of storage units, each storage unit storing an element of the matrix, and transposing the matrix of data into a second set of registers, the second set of registers having a second number of registers, each register comprising a second number of storage units. The method also includes referencing one of the first set of registers to operate on a row of the matrix of data, and referencing one of the second set of registers to operate on a column of the matrix of data.
Inventors:
Chen, George Kay
Application Number:
JP2011177920A
Publication Date:
April 09, 2014
Filing Date:
August 16, 2011
Export Citation:
Assignee:
INTEL CORPORATION
International Classes:
G06F9/30; G06F9/302; G06F9/318; G06F9/34
Domestic Patent References:
| JP7175444A | ||||
| JP7239842A | ||||
| JP10154140A | ||||
| JP3160537A | ||||
| JP57055478A | ||||
| JP9214746A |
Attorney, Agent or Firm:
Masaki Yamakawa
Shigeki Yamakawa
Shigeki Yamakawa