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Title:
RELAY DRIVE CIRCUIT AND VOLTAGE CONTROL METHOD
Document Type and Number:
Japanese Patent JPH03145028
Kind Code:
A
Abstract:

PURPOSE: To prevent a latch-up by using a first relay drive circuit to operate responding instantly to a variation of an input signal and to restore after delaying a specific time, and a second relay drive circuit to operate after delaying a specific time from a variation of the input signal and to restore responding instantly.

CONSTITUTION: A first relay drive circuit 10 which consists of a delay circuit consisting of inverters 2 and 6, a diode 3, a resistance 4, and a condensor 5; a buffer 7; a transistor 8 to drive the relay; and a relay 9 to apply or cut off the power source voltage of an IC and an LSI is provided. And a second relay drive circuit 20 which consists of a delay circuit consisting of inverters 12 and 16, a diode 13, a resistance 14, and a condensor 15; a buffer 17; a transistor 18 to drive the relay; and a relay 19 to apply or cut off the power source voltage of the IC and the LSI; and an input terminal 1 are provided. Consequently, a latch-up of the IC can be prevented.


Inventors:
MATSUBARA TAKAO
Application Number:
JP28378989A
Publication Date:
June 20, 1991
Filing Date:
October 30, 1989
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01H47/18; H01H47/22; H03K5/13; (IPC1-7): H01H47/18; H01H47/22; H03K5/13
Attorney, Agent or Firm:
Uchihara Shin



 
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