PURPOSE: To improve processing speed by transferring error control information to an HIPPI terminal equipment, implementing error control processing at the destination of the terminal equipment, and applying error correction by a re-transmission function of the terminal equipment when the error is detected.

CONSTITUTION: An HIPPI control signal management section 110 identifies valid data on a data transfer bus 103 and an error control information transfer bus 104 and informs an identification signal to a burst input section 111 and an error control information input section 112. The input section 11 receives data and the input section 112 receives error control information, a bit width converter circuit 114 takes alignment of a bit width and the resulting information is stored in a reception buffer 115 and a control information buffer 16. The data and the information stored in the buffers 115, 116 are transferred to a packet composition section according to the control of an HIPPI state management section 113, in which they are mapped and composed into a data transfer packet with a packet header generated by a header generating section 118. A CPCS processing section 122 composes the packet into an AAL frame and it is transferred.