PURPOSE: To enable generation of a large electric stress inside a semiconductor, by keeping an input terminal of a reading control signal electrically floating when a data stored is read out and outputted to a data output terminal.
CONSTITUTION: When a floating voltage (f) generated at a negative CE input terminal 1 is used as negative CE signal with the negative input terminal 1 kept electrically floating, a chip of a EPROM becomes active or inactive according to fluctuation of the voltage (f) inside. With such an arrangement, even when an address signal is inputted sequentially in circulation, it is determined incidentally by a voltage of the terminal 1 at each action of inputting whether reading is performed actually or not. Therefore, when a power source voltage VCC is applied to a power source terminal 3 to provide an address signal with data output terminals D0WD7 separated from one another, a noise is generated in a power source line inside the EPROM. Thus, an electrically unstable part is generated in such a manner that it could not be when a normal EPROM is used, thereby enabling the flowing of a transient large current through an internal circuit of the EPROM.
KODA KENJI
ANDO NOBUAKI
KOBAYASHI SHINICHI
NOGUCHI KENJI
