PURPOSE: To secure an independent input and then a converting process with every element Ci, by suppling the partial bit of the element Ci of L units of the set Zmi plus the identification code into the converter consisting of the multiplication part, the adder, the delaying circuit and the switch each to then undergo the processing.

CONSTITUTION: The element Ci of L units of the set Zmi composed of the residual number with the devisor of mi is converted into the element C of one unit of the set ZM composed of the residual number with the divisor of M(πLmi). In this case, the partial bit of the element Ci and the identification code corresponding to i are supplied simultaneously to terminals 15 and 17 each of the multiplication part 16. At part 16, the constant αi is selected out of the indentification code composed at the ROM and supplied from the terminal 17, and αiCi is delivered to receive a cumulative addition by the adder 18. The output of the adder 18 is supplied to the adder 18 via the delaying circuit 19 to be added to the output of part 16 against the next element Ci. When L units of the element Ci is supplied to the part 16, the final result is extracted to the output terminal 22 via the switch 21.