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Patent Searching and Data


Title:
RESIST DEVELOPING METHOD FOR WAFER
Document Type and Number:
Japanese Patent JPH10339956
Kind Code:
A
Abstract:

To eliminate micro bubbles in developer so as to reduce the defect of a circuit pattern on a wafer and to obtain a semiconductor chip being a nondefective by increasing the revolving speed of the wafer stepwise from low-speed rotation to high-speed rotation when the developer is dripped on the surface of the wafer.

The wafer 3 which is coated with resist and where a mask pattern is exposed is held by a spin chuck 4, and developer 2 is discharged while a nozzle 1 is moved to the center part from the outer periphery direction of the wafer 3 at the time of developing. Since the radius of rotation is smaller at the center part of the wafer than at the outer periphery part of the wafer, the micro bubbles are shaken off to the outside of the wafer 3 by rotating the wafer 3 at high speed. Namely, the wafer 3 is rotated at low speed first and its revolving speed is increased as soon as the developer 2 is dripped to the outer periphery part of the wafer while the nozzle 1 is moved toward the center from the outside of the wafer 3, whereby the micro bubbles of the developer 2 dripped at the outer periphery part of the wafer are shaken off.


Inventors:
MINE MASATAKE
Application Number:
JP14923997A
Publication Date:
December 22, 1998
Filing Date:
June 06, 1997
Export Citation:
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Assignee:
KYUSHU NIPPON ELECTRIC
International Classes:
G03F7/30; H01L21/027; (IPC1-7): G03F7/30; G03F7/30; H01L21/027
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)