RESTORABLE SET ASSOCIATIVE CACHE - SGS THOMSON MICROELECTRONICS

Title:

RESTORABLE SET ASSOCIATIVE CACHE

Document Type and Number:

Japanese Patent JPH0822417

Kind Code:

A

Abstract:

PURPOSE: To turn a set associative cache memory into a usable state by bypassing the data of lines having one or more defective bit data in the set associative cache memory.

CONSTITUTION: It is assumed that a cache memory set A 32 of a bi-directional set associative cache memory 30 has data 34 of one or more defective lines for an applied index address. At this time, the replacement status bits of the index address related to the data 34 of the set A 32 are forced to a logical high level, and the replacement status bits related with data 38 of one line in a cache memory set B 36 are always forced to a logical low level. Therefore, data 42 of a replacement line from a main memory 40 are replaced by the data 38 of one line of the set B 36, and the data 34 of the defective lines of the set A 32 can be substantially bypassed without being updated.

Inventors:

DEIBITSUDO SHII MAKUKURUUA

Application Number:

JP7271195A

Publication Date:

January 23, 1996

Filing Date:

March 30, 1995

Export Citation:

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Assignee:

SGS THOMSON MICROELECTRONICS

International Classes:

G06F12/08; G06F12/12; G11C15/00; G11C15/04; G11C29/00; G11C29/04; (IPC1-7): G06F12/08; G06F12/08; G06F12/12; G11C15/00

Attorney, Agent or Firm:

Kazuo Kobashi (1 person outside)

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