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Patent Searching and Data


Title:
ROM ERASER PACKAGED ON CIRCUIT BOARD
Document Type and Number:
Japanese Patent JPH06290592
Kind Code:
A
Abstract:

PURPOSE: To prevent a failure caused by defective contact of a ROM.

CONSTITUTION: A circuit board 20 on which a ROM 22 to be erased is, packaged is mounted on a substrate tray 2 which is housed in a case 1 so as to be drawable. An ultraviolet lamp 11 is arranged facing in parallel with a circuit board main body 21 of the circuit board 20. In order to strengthen the intensity of ultraviolet with which the circuit board 20 is irradiated and uniformalize the intensity distribution of ultraviolet, a reflecting mirror is arranged over the ultraviolet lamp 11. That is, this ROM eraser 100 packaged on the circuit board erases memory signals in the ROM 22 in a state in which it is packaged on the circuit board 20. Therefore, since the ROM can be directly packaged on the circuit board without using a ROM socket, defective contact between the ROM and the ROM socket does not occur.


Inventors:
WATANABE MASAKATSU
Application Number:
JP9690993A
Publication Date:
October 18, 1994
Filing Date:
March 30, 1993
Export Citation:
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Assignee:
DAIFUKU KK
International Classes:
G11C17/00; G11C16/02; G11C16/06; (IPC1-7): G11C16/06
Attorney, Agent or Firm:
Shigeaki Yoshida (2 outside)