PURPOSE: To decrease a high frequency noise against a DC control voltage signal, and to satisfactorily hold the frequency stability of a sample holding circuit, by providing 2 loop filters for sample holding, and removing a high frequency noise.

CONSTITUTION: A phase detecting output signal IN1 is sampled by a switch SW1 and a capacitor, and a sampling signal is outputted through a buffer amplifier IC1, a loop filter 1 and a buffer amplifier IC2. Between this switch SW1 and a resistance R3 connected to a positive input terminal of the amplifier IC1, the loop filter 1 for sample holding is connected, the phase detecting output signal is sampled by the switch SW1 and the capacitor C1 in the filter 1, and also high frequency is decreased by the filter 1. Also, the high frequency noise is decreased by inserting a loop filter 2 between the amplifier IC1 and the amplifier IC2.