Title:
サンプルウェル作製技法および集積センサデバイス用の構造
Document Type and Number:
Japanese Patent JP7428701
Kind Code:
B2
Abstract:
Methods of forming an integrated device, and in particular forming one or more sample wells in an integrated device, are described. The methods may involve forming a metal stack over a cladding layer, forming an aperture in the metal stack, forming first spacer material within the aperture, and forming a sample well by removing some of the cladding layer to extend a depth of the aperture into the cladding layer. In the resulting sample well, at least one portion of the first spacer material is in contact with at least one layer of the metal stack.
Inventors:
Schmid, Gerrard
Beach, james
Beach, james
Application Number:
JP2021510980A
Publication Date:
February 06, 2024
Filing Date:
August 29, 2019
Export Citation:
Assignee:
QUANTUM-SI INCORPORATED
International Classes:
G01N21/03; C12M1/00; H01L31/0232
Domestic Patent References:
| JP5507813A | ||||
| JP4340721A | ||||
| JP2005345353A | ||||
| JP2018521308A |
Foreign References:
| US20170350818 |
Attorney, Agent or Firm:
Makoto Onda
Hironobu Onda
Atsushi Honda
Hironobu Onda
Atsushi Honda