PURPOSE: To execute save/reload of a program at a high speed by providing a save register and a registor save stack so that the newest save value in a working register can be transferred by a clock-one-cycle.
CONSTITUTION: When values of working registers R1WR4 are saved along with buliding a new frame of a main stack 1, they are transferred to the save registers R1WR4 by one cycle. Thereafter, other parts of a CPU can start other processing. In terms of a working register save circuit, only meaningul values in the registers R'1WR4' are sequentially stored in a registor save stack 5 one by one. When one frame is deleted on the stack 1, and an operation returns to the previous frame on the stack 1, values are transferred to the registers R1'WR4'. In the working register save circuit, the registers R1'WR4' read out sequentially the value to be reloaded from the register save stack 5 one by one.
JPS5398753A | 1978-08-29 | |||
JPS50128952A | 1975-10-11 |