To provide a scanning flip-flop circuit and a register file capable of storing two data.

This scanning flip-flop circuit/register file is provided with the first selector 11 for selecting the first data based on a signal SS indicating a latch mode, and for selecting a scanning data S1 based on the signal SS indicating a scan mode, the first latch part 12 for latching the first data or scanning data S1 selected by the first selector part 11, synchronized with a synchronization signal GA, the second selecting part 13 for selecting the second data based on the signal SS indicating the latch mode, and for selecting the scanning data by the first latch part 12 based on the signal SS indicating the scan mode, and the second latch part 14 for latching the second data selected by the second selector part 13, synchronized with the synchronization signal GA, in the latch mode, and for latching the scanning data by the second selector part 13, synchronized with a signal GB of a phase reverse to that of the signal GA, in the scanning mode.