PURPOSE: To make very small a source resistance and to contrive an superhigh- speed operation of the title transistor by a method wherein the transistor is provided with a gate electrode and drain electrodes, which are formed on the main surface on one side of a single crystal silicon layer, and a source electrode, which is formed on the other main surface of the single crystal silicon layer in a state that it is buried in an insulating film.

CONSTITUTION: A gate electrode G and a source electrode S are respectively formed on the main surface on one side of a single crystal silicon layer 3 and the other main surface of the layer 3. Owing to this, the interval between these electrodes G and S is equal to the thickness of the layer 3. This layer 3 can be easily formed using a SOI (Silicon on Insulator) technique and the thickness of the layer 3 can be made very small in hundreds of or thereabouts, for example. Accordingly, the interval between the electrodes G and S can be shortened in hundreds of or thereabouts, for example, quite regardless of the limit of a lithography. Thereby, a source resistance can be made very small and an increase in the super high-speed operation of a Schottky gate field-effect transistor is contrived.