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Patent Searching and Data


Title:
SCRAMBLER/DE-SCRAMBLER
Document Type and Number:
Japanese Patent JPH0316336
Kind Code:
A
Abstract:

PURPOSE: To simplify a circuit constitution by executing count control processing with the arithmetic processing in the unit of words not attended with the bit shift arithmetic processing.

CONSTITUTION: A random/inverse random processing means 1 inverts and outputs the bits of an output data to a MODEM 5 when a bit inverse flag data is a prescribed value such as 'true'. A count control processing means 3 sets the content of a numeral to an initial value when all prescribed bits of a data representing the result of shift calculation are not coincident with bits inputted next to a bit shift arithmetic means 4 or the value of a bit inverse flag data is true. Thus, random code processing or decoding is executed with a simple circuit by the execution of the arithmetic processing in the unit of words not attended with the bit shift arithmetic processing and the consecutive production of the code with a short period generated not applied with random processing on the property of the generation polynomial is prevented.


Inventors:
MAENO TAKAHIRO
SATO YASUNORI
Application Number:
JP5485090A
Publication Date:
January 24, 1991
Filing Date:
March 08, 1990
Export Citation:
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Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H04L7/00; H03K3/84; H04L25/03; (IPC1-7): H04L7/00
Attorney, Agent or Firm:
Toshiaki Suzuki