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Title:
SCREEN SYNTHESIZING CIRCUIT
Document Type and Number:
Japanese Patent JPH01206392
Kind Code:
A
Abstract:

PURPOSE: To reduce the burden of a software by executing a control of displaying/not displaying a screen by a selecting signal and further selecting it by the priority which has been set in advance to a multiplexer, when plural selected screens exist.

CONSTITUTION: Data of each memory of a memory group 1 of various screens are compared in a comparing circuit 2, respectively, and given to a selecting circuit 3 as ON/OFF bit outputs corresponding to the number of memories. The selecting circuit 3 receives a selecting signal for selecting the data of a desired memory in the memory group 1 of various screens, selects the ON/OFF outputs of the comparing circuit 2, and gives a result of selection to a multiplexer 4. In the multiplexer 4, the data of the memory is selected is accordance with an output of the selecting circuit 3, and also, from in its memory data, that of the highest priority is selected and outputted by a prescribed priority. In such a way, the burden of a software of a CPU can be reduced.


Inventors:
MIZOGUCHI TOSHIRO
KUNIMOTO YASUHIRO
Application Number:
JP3135388A
Publication Date:
August 18, 1989
Filing Date:
February 12, 1988
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G09G5/377; G09G1/00; G09G1/02; G09G5/00; G09G5/40; H04N1/387; (IPC1-7): G09G1/00; G09G1/02; H04N1/387
Domestic Patent References:
JPS61249092A1986-11-06
Attorney, Agent or Firm:
Shuji Moizumi



 
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