PURPOSE: To minimize the waveform distortion of the signal between the input and the output of the selector device by adding respectively an additional circuit composed of the same circuit as the logical gate used to the selector to constitute respective selector circuits, to the rear step of the selector at the final step of respective selector circuits when the number of steps is odd, and taking out the output from respective adding circuits.
CONSTITUTION: An adding circuit 5 is provided with the rear step of the selector at the final step of respective selector circuits 3 composed of the selector at the odd step. When seven selectors 6 are used and one 8:1 selector device is constituted, at such a case, the selector to constitute the selector circuits 3 is in an odd number step, and therefore, the adding circuit 5 to show the rise and the fall equal to the logical gate, which constitute the 2:1 selector 6, is added to the final step, thereby the time Δ of the difference between the rise and the fall is minimized and the waveform distortion can be improved.
KATAOKA HIDEKI
KATAOKA KEISUKE
TSUBAKI JUNKO
KOKUCHIDE NAOTO
| JPS4946366A | 1974-05-02 | |||
| JPS5783922A | 1982-05-26 |