Title:
SELF-SCANNING LIGHT EMITTING ELEMENT ARRAY CHIP
Document Type and Number:
Japanese Patent JP2003243696
Kind Code:
A
Abstract:
To provide a self-scanning light emitting element array formed on an Si substrate using Si as a structural material.
A lattice mismatch relaxation layer 32 is formed on an Si substrate 30. An n-type AlGaAs layer 14, a p-type AlGaAs layer 16, an n-type AlGaAs layer 18, and a p-type AlGaAs layer 20 are formed sequentially on the lattice mismatch relaxation layer 32 by epitaxial growth. An anode electrode 22 is provided on the AlGaAs layer 20, a gate electrode 24 is provided on the AlGaAs layer 18, and a cathode electrode 26 is provided on the rear surface of a GaAs substrate.
Inventors:
ONO SEIJI
Application Number:
JP2002341628A
Publication Date:
August 29, 2003
Filing Date:
November 26, 2002
Export Citation:
Assignee:
NIPPON SHEET GLASS CO LTD
International Classes:
B41J2/44; B41J2/45; B41J2/455; H01L27/15; H01L33/30; H01L33/62; (IPC1-7): H01L33/00; B41J2/44; B41J2/45; B41J2/455
Attorney, Agent or Firm:
Yoshiyuki Iwasa
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