PURPOSE: To design an LSI wherein a pluraility of power supplies mixedly exist, by converting names of cells driven by different power supply potentials so as to correspond with the power supply potentials, distinguishing the parts diven by different power supply potentials, and forming a net list.

CONSTITUTION: A net list 19 is outputted on a hierarchy expansion part 14 by flatly expanding a circuit diagram 14a having hierarchy structure or by outputting the internal constitution of a simulation model or the like. The hierarchy expansion part 14 converts the names of cells which have the mutually same functions and are driven by different power supply potentials so as to correspond with the power supply potentials. A logic simulation part 15 using virtual wiring lengths calculates the delay time by converting the virtual wiring lengths registered into a library 20 in resistance components and capacitance components. Results of layout 16 are subjected to delay calculation by a logic simulation part 17. Whether a product is perfect is judged by test program formation 18. Thereby wiring design is enabled with a small amount of strong capacity.