To provide a semiconductor device capable of reducing the possibilities of soft errors due to alpha rays or the like and also of suppressing the leakage current.

The semiconductor device 1000 includes a plurality of memory cells formed on a p-type semiconductor substrate 540, each cell comprising a p- well 530 wherein an NMOS transistor Q3 is formed and which is set to the ground potential; an n- well 532 wherein a PMOS transistor Q5 is formed and which is adjacent to the p- well 530 and is set to a power supply potential Vdd; and an n-type buried layer 538 which is separated from the p- well 532, and separates lower parts of the p- well 530 and the n- well 532 from the semiconductor substrate 540. The buried layer 538 is set to a potential Vbn lower than the power supply potential Vdd. The NMOS transistor Q3 and the PMOS transistor Q5 are connected in series to form an inverter and constitute part of a flip-flop circuit.