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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND FABRICATION THEREOF
Document Type and Number:
Japanese Patent JPH06310706
Kind Code:
A
Abstract:

PURPOSE: To decrease the contact resistivitance of an ohmic electrode to be formed on a p-InGaAs layer by composing the ohmic electrode sequentially of the layers of palladium/zinc/platinum/gold(Pd/Zn/Pt/Au).

CONSTITUTION: In order to decrease the contact resistivitance, such an electrode material is required as impurities are diffused into the base so that the concentration of the carrier is increased on the surface of the base wherein Pd/Zn/Pt/ Au is employed as the base electrode 8. The breakdown voltage of the element is restrained from lowering by employing a platinum group Pd, which does not overreact during the heating process for forming the electrode but reacts slowly at the lowermost layer. Furthermore, p-type impurities, i.e., Zn, are employed in the next layer and the carrier concentration is increased on the surface of the base layer 5 through diffusion of the impurities into the base layer thus lowering the contact resistivitance. This constitution of electrode layer optimizes the thickness and the heat treatment temperature of each layer while improving the ohmic contact.


Inventors:
SHIGEMATSU HISAO
Application Number:
JP9321893A
Publication Date:
November 04, 1994
Filing Date:
April 20, 1993
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L29/43; H01L21/28; (IPC1-7): H01L29/46; H01L21/28
Attorney, Agent or Firm:
Teiichi