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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE HAVING IMPURITY CONDUCTOR CIRCUIT, AND METHOD AND DEVICE FOR MANUFACTURING SAME
Document Type and Number:
Japanese Patent JPH03268448
Kind Code:
A
Abstract:

PURPOSE: To improve the arbitrariness of the debugging of LSIs, etc., and of failure analysis by abbitrarily connecting between an impurity conductor circuit and wiring to alter a semiconductor circuit with the impurity calculation circuit.

CONSTITUTION: On the surface of a semiconductor device(LSI) 50 which has substantially been complete, i.e., an insulating film 8 of a wiring layer 52, a non-conductor film is formed in the intrinsic state of Si and the like using film formation means available in the manufacturing process of LSIs for example, into which film a P type impurity is doped following a desired pattern configuration to form a P type conductor 1. Further, an N type impurity is doped following a desired pattern configuration to form an N type conductor 2. Thereafter, a P or N type impurity is selectively doped into an intrinsic region 3 at a proper location in an impurity conductor circuit 60 constructed after said film is annealed, and is further annealed to enable semiconductor circuits 42, 43 to be altered. Hereby, a debugging process can be simplified to satisfactorily deal with complicated debugging.


Inventors:
SHIMASE AKIRA
HARAICHI SATOSHI
AZUMA JUNZO
ITO FUMIKAZU
TAKAHASHI TAKAHIKO
OKAMOTO EMIKO
Application Number:
JP6700390A
Publication Date:
November 29, 1991
Filing Date:
March 19, 1990
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L21/82; (IPC1-7): H01L21/82
Attorney, Agent or Firm:
Yasuo Sakuta (1 outside)