Title:
SEMICONDUCTOR DEVICE HAVING MULTI-LAYERED WIRING STRUCTURE AND ITS FABRICATING METHOD
Document Type and Number:
Japanese Patent JPH0645460
Kind Code:
A
Abstract:
PURPOSE: To enhance the reliability and production yield of layer insulating film in a semiconductor apparatus having a multi-layered wiring structure.
CONSTITUTION: Metal wiring 6 for the first layer is formed through insulating film 4 on a silicon substrate 2 on which semiconductor elements have been formed, main insulating film 8 such as PSG film is formed on the wiring 6, and further the main insulating film 8 is covered with protective insulating film 10 of silicon nitride. On the protective insulating film 10 the second layer metal wiring 12 is formed. Thus, the protective insulating film 10 enhances the moisture resistance of interlayer insulating films and acts as a protective film against etching when forming through holes.
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Inventors:
SUETOMI NOBUYUKI
Application Number:
JP21860092A
Publication Date:
February 18, 1994
Filing Date:
July 24, 1992
Export Citation:
Assignee:
RICOH KK
International Classes:
H01L21/318; H01L21/768; H01L23/522; (IPC1-7): H01L21/90
Attorney, Agent or Firm:
Noguchi Shigeo
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