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Title:
SEMICONDUCTOR DEVICE, HBT, AND HEMT
Document Type and Number:
Japanese Patent JPH06318606
Kind Code:
A
Abstract:

PURPOSE: To improve surface morphology and to form a fine emitter with an improved reproducibility by inserting several layers of thin GaAs electrode layers into an InGaAs layer formed on a GaAs layer with a specific spacing.

CONSTITUTION: In a HBT 100, the surface side part of an emitter contact layer 132 on a GaAs emitter layer 231 is constituted by an In0.5Ga0.5AS layer in ultra period structure where four thin GaAs electrode layers approximately 10 are inserted, thus suppressing the segregation of In atoms which becomes remarkable in the high-temperature growth of an InGaAs layer, namely a phenomenon where the In atoms travel toward the surface side in growing InGaAs crystal and the elimination of the In atoms by GaAs extremely thin layer and causing the InGaAs layer on the GaAs layer 231 to grow at a high temperature without deteriorating the surface morphology.


Inventors:
IZUMI MOICHI
Application Number:
JP10791793A
Publication Date:
November 15, 1994
Filing Date:
May 10, 1993
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L21/20; H01L21/331; H01L21/338; H01L29/06; H01L29/15; H01L29/205; H01L29/737; H01L29/778; H01L29/80; H01L29/812; (IPC1-7): H01L21/338; H01L21/20; H01L21/331; H01L29/06; H01L29/205; H01L29/73; H01L29/804; H01L29/812
Attorney, Agent or Firm:
Kenichi Hayase