Title:
SEMICONDUCTOR DEVICE FOR INVERTER CONTROL
Document Type and Number:
Japanese Patent JP3897598
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To surely start an A/D conversion in combining the specified ON and OFF of a predetermined PWM signal, in an inverter control semiconductor in which the pulse width of a PWM signal is controlled based on a digital value in an A/D converter.
SOLUTION: When a counter 3 for generating a PWM signal counts a prescribed counter value, a timer 21 receives a signal from the counter 3 and starts counting. Based on a duty setting value stored in a duty setting register (7U in a U-phase) of a PWM signal generating circuit, the timer period of the timer 21 is computed, and the timer period is stored in a timer period setting register 22. When the timer 21 counts the timer period stored in the timer period setting register 22, the timer 21 instantaneously generates an A/D conversion starting factor and outputs it to a corresponding A/D converter 1g to start A/D conversion. As a result, A/D conversions at more minute timings becomes possible.
Inventors:
Masaru Kawamoto
Kawaji Koji
Kawaji Koji
Application Number:
JP2002003247A
Publication Date:
March 28, 2007
Filing Date:
January 10, 2002
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
G06F15/78; H02M7/48; G06F1/025; G06J1/00; H02M7/529; H03K5/156; H03K7/08; (IPC1-7): H02M7/48; G06F15/78
Domestic Patent References:
| JP8272765A | ||||
| JP11136950A | ||||
| JP7007971A |
Attorney, Agent or Firm:
Hiroshi Maeda
Hiroshi Koyama
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Teshima Masaru
Atsushi Fujita
Hiroshi Koyama
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Teshima Masaru
Atsushi Fujita
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