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Title:
SEMICONDUCTOR DEVICE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPH0661269
Kind Code:
A
Abstract:

PURPOSE: To acquire a semiconductor device wherein a step on a semiconductor substrate is reduced and a device on the semiconductor substrate is completely separated from other regions and a manufacturing method thereof.

CONSTITUTION: A resist pattern is arranged in a specified region on an n-InGaAs layer for ohmic junction on an uppermost layer of a compound semiconductor crystalline layer on an InP substrate 1, the n-InGaAs layer is selectively mesa- etched using the resist pattern as a mask and ion implantation is performed for the compound semiconductor crystalline layer to form an insulating region 13. Source/drain electrodes 9a, 9b are formed on an upper surface of the n- InGaAs layer, a recess 11 is formed while a source electrode 9a-to-drain electrode 9b current is measured, and a fine gate electrode 10b which extends to arm upper surface of the insulation region 13 from a bottom of the recess 11 is formed by adopting lift-off technique.


Inventors:
TERAZONO SHINICHI
Application Number:
JP23655692A
Publication Date:
March 04, 1994
Filing Date:
August 11, 1992
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L21/335; H01L21/338; H01L21/76; H01L29/778; H01L29/812; (IPC1-7): H01L21/338; H01L29/812; H01L21/76
Attorney, Agent or Firm:
Kenichi Hayase