To provide a method of manufacturing a semiconductor device, where a capacitor is low in voltage dependence and nearly uniform in electrostatic capacity.

N-type impurities are added to a part of the surface layer of a P-type silicon substrate 1 to form an N-type well. N-type impurities are added, for instance, through an ion implantation method. A shallow trench-type element isolation structure 3 is formed on the surface of the substrate 1, an active region 4p used for forming a P-channel MISFET is demarcated on the surface of the N-type well 2, and an active region 4N used for forming an N-channel MISFET is demarcated in a P-type region. Moreover, the element isolation structure 3 may be formed through a local oxidation of silicon (LOCOS) method. A pick-up substrate formed by Czochralski method may be used as the silicon substrate 1, or an epitaxial growth substrate or a silicon-on-insulator substrate(SOI) substrate may be used as the silicon substrate 1. The surfaces of the active region 4P and 4N are thermally oxidized, whereby a gate oxide film is formed on their surfaces respectively.