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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE, AND ITS MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2008130926
Kind Code:
A
Abstract:

To secure or improve a breakdown voltage of a dielectric film in a semiconductor device which has a capacitive element of a metal-insulating film-metal structure with the dielectric film sandwiched between two metal layers.

The semiconductor device includes the capacitive element having the metal layer 5 for a lower electrode provided on a semiconductor substrate 1 through the insulating films 2, 3, and the metal layer 9 for an upper electrode provided on the metal layer 5 for the lower electrode through the dielectric film 7, wherein the metal layer 5 for the lower electrode and the metal layer 9 for the upper electrode are formed into electrode-like shapes using antireflection films arranged on each upper face. In the semiconductor device, an electrode face of the metal layer 5 for the lower electrode and an electrode face of the metal layer 9 for the upper electrode which are directly brought into contact with the dielectric film 7 are formed by materials which are higher in reducing action than the antireflection films. Upper and lower faces of the dielectric film are put into contact with the metal layers which are higher in reducibility than the antireflection films, by which reduction of oxygen in the dielectric film is promoted, and a stress caused by the oxygen in the dielectric film is relaxed.


Inventors:
OTANI ITARU
NANJO TAKESHI
Application Number:
JP2006316013A
Publication Date:
June 05, 2008
Filing Date:
November 22, 2006
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H01L21/822; H01L27/04
Attorney, Agent or Firm:
Akio Miyai