Title:
SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP3926239
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method in which a connection resistance of an interlayer connection part is small and connection reliability is high.
SOLUTION: A conductive paste is applied to a predetermined location on a wiring pattern of a printed wiring substrate 1 to form conductive bumps 9a, 9a and the like, a barrier metal layer 13 like an Ni layer is formed on an upper surface of the conductive bumps 9a, 9a and the like, and a weldable metal layer 15 like an Au layer is formed further thereon. Electrode plates 23, 23 and the like of a semiconductor element 20 are aligned with the conductive bumps 9a, 9a and the like, and ultrasonic waves of a predetermined frequency are oscillated and simultaneously the semiconductor element 20 and the printed wiring substrate 1 are pressed. The conductive bumps 9a, 9a and the like are directly jointed to the electrode plates 23, 23 and the like of the semiconductor element 20. Next, an insulating material composition 17 is filled in a gap between the semiconductor element 20 and the printed wiring substrate 1.
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Inventors:
Hiroyuki Hirai
Fukuoka Yoshitaka
Fukuoka Yoshitaka
Application Number:
JP2002237123A
Publication Date:
June 06, 2007
Filing Date:
August 15, 2002
Export Citation:
Assignee:
Dai Nippon Printing Co.,Ltd.
International Classes:
H01L21/60; H01L21/607; (IPC1-7): H01L21/60; H01L21/607
Domestic Patent References:
| JP10335373A | ||||
| JP11168116A | ||||
| JP63308352A |
Foreign References:
| WO1996042107A1 |
Attorney, Agent or Firm:
Saichi Suyama
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