Title:
半導体装置及びその作製方法
Document Type and Number:
Japanese Patent JP7012898
Kind Code:
B2
Abstract:
A miniaturized transistor is provided with high yield. Further, a semiconductor device which has high on-state characteristics and which is capable of high-speed response and high-speed operation is provided. In the semiconductor device, an oxide semiconductor layer, a gate insulating layer, a gate electrode layer, an insulating layer, a conductive film, and an interlayer insulating layer are stacked in this order. A source electrode layer and a drain electrode layer are formed in a self-aligned manner by cutting the conductive film so that the conductive film over the gate electrode layer and the conductive layer is removed and the conductive film is divided. An electrode layer which is in contact with the oxide semiconductor layer and overlaps with a region in contact with the source electrode layer and the drain electrode layer is provided.
Inventors:
Toshihiko Saito
Atsushi Isobe
Kazuya Hanaoka
Junichi Kozuka
Shinya Sasakawa
Kurata
Akihiro Ishizuka
Atsushi Isobe
Kazuya Hanaoka
Junichi Kozuka
Shinya Sasakawa
Kurata
Akihiro Ishizuka
Application Number:
JP2021179927A
Publication Date:
January 28, 2022
Filing Date:
November 04, 2021
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L29/786; H01L21/8234; H01L21/8242; H01L27/06; H01L27/088; H01L27/108
Domestic Patent References:
| JP2004186393A | ||||
| JP200815487A | ||||
| JP2008262962A | ||||
| JP2008270773A | ||||
| JP2011124557A |
Foreign References:
| US20080230835 | ||||
| US20110227074 |