Title:
半導体装置とその製造方法
Document Type and Number:
Japanese Patent JP7156170
Kind Code:
B2
Abstract:
To provide a technique for achieving low channel resistance in a semiconductor device including a trench gate section having a bottom insulation film having large film thickness.SOLUTION: A semiconductor device 1 includes: a semiconductor substrate 10; a trench gate section 30 formed in a gate trench TR 1 formed on one principal plane of the semiconductor substrate 10; and a source electrode 24 formed in a contact trench TR 2 formed on a surface 10B of the semiconductor substrate 10. The semiconductor substrate 10 is arranged between a drift region 12 and a body region 13 under the contact trench TR 2 and has a high-concentration semiconductor region 15 of which n-type carrier concentration is higher than that of the drift region 12. The trench gate section 30 is arranged under the gate electrode 34b and has a bottom insulation film 32a of which film thickness is larger than that of a gate insulation film 34a.SELECTED DRAWING: Figure 1
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Inventors:
Takashi Suzuki
Akira Yamada
Kenta Goda
Akira Yamada
Kenta Goda
Application Number:
JP2019094483A
Publication Date:
October 19, 2022
Filing Date:
May 20, 2019
Export Citation:
Assignee:
Toyota Central R & D Labs.
International Classes:
H01L29/78; H01L21/336
Domestic Patent References:
| JP2016072482A | ||||
| JP2007294759A | ||||
| JP2008108962A |
Attorney, Agent or Firm:
Patent Attorney Corporation Kaiyu International Patent Office
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