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Title:
SEMICONDUCTOR DEVICE AND LEAD FRAME USED THEREFOR
Document Type and Number:
Japanese Patent JPH01268161
Kind Code:
A
Abstract:

PURPOSE: To prevent wirings from improperly short-circuiting even if the loop of a bonding wiring is deformed at the time of resin sealing by differentiating the heights of at least one or more adjacent inner leads of ends to be wire bonded to the inner leads.

CONSTITUTION: The inner leads 2 of a lead frame 1 are formed by alternately disposing inner leads 2A recessed by depressing down at the ends, and inner leads 2B not depressed at the ends and differentiating the heights of the adjacent leads 2A, 2B. A silicon chip 4 is die bonded with silver paste to the die pad 3 of the frame 1, and the chip 4 is wire bonded with gold wirings 5 to the leads 2. ln this configuration, the frame 1 and the chip 4 are transfer molded with epoxy sealing resin. In this case, the wirings 5 might be forcibly fed by the resin to deform its loop. However, it is scarcely short-circuited.


Inventors:
KOUTOU NORIO
Application Number:
JP9858688A
Publication Date:
October 25, 1989
Filing Date:
April 20, 1988
Export Citation:
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Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
H01L21/60; H01L23/50; (IPC1-7): H01L21/60; H01L23/50
Attorney, Agent or Firm:
Yoshihiro Morimoto



 
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